Date |
References | ||
|---|---|---|---|
| Lecture 01 | 6th Aug 2024 | Introduction (Ch 1 in [1]) | |
| Lecture 02 | 8th Aug 2024 | Introduction (Ch 1 in [1]) | |
| Lecture 03 | 9th Aug 2024 | Bits, Data Types, and Operations (Ch 2 in [1] and Ch 1.4 in [2]) | |
| Lecture 04 | 16th Aug 2024 | Digital Logic Structures (Ch 3.1, 3.2 and 3.3.1 in [1]) | |
| Lecture 05 | 20th Aug 2024 | Digital Logic Structures (Ch 3.3 in [1]) | |
| Lecture 06 | 22nd Aug 2024 | Combinational Logic Design (Ch 2.1 to 2.4 in [2]) | |
| Lecture 07 | 23rd Aug 2024 | Karaugh Maps (Ch 2.7 in [2]) | |
| Lecture 08 | 27th Aug 2024 | Memory (Ch 3.4, 3.5 in [1]) | |
| Lecture 09 | 29th Aug 2024 | Sequential Logic Circuits (Ch 3.6 in [1]) | |
| Lecture 10 | 30th Aug 2024 | Verilog Lab (Presentation, Assignment) | |
| Lecture 11 | 3rd Sept 2024 | Verilog Lab (Presentation, Assignment) | |
| Lecture 12 | 5th Sept 2024 | Arithmetic Circuits (Addition) (Ch 5.2.1 in [2]) | |
| Lecture 13 | 6th Sept 2024 | Arithmetic Circuits (Addition) (Ch 5.2.1 in [2]) | |
| Lecture 14 | 10th Sept 2024 | Verilog Lab (Presentation, Assignment, Assignment) | |
| Quiz | 17th Sept 2024 | Quiz | |
| Lecture 15 | 19th Sept 2024 | Arithmetic/Logical Unit (ALU) (Ch 5.2.2 to 5.2.5 in [2]) | |
| Lecture 16 | 20th Sept 2024 | Von Neumann Slides, (Ch 4.1 in [1], 6.1, 6.2 in [2]) | |
| Lecture 17 | 24th Sept 2024 | LC-3 Data Path & Basic LC-3 and | |
| MIPS Instructions (Ch 4.2 in [1], Ch 6.3 in [2]) | |||
| Lecture 18 | 26th Sept 2024 | Instruction Processing Cycle with LC-3 Data Path (Ch 4.3 in [1]) | |
| Mid-Term Exam | 28th Sept 2024 | Theory, Lab | |
| Lecture 19 | 15th Oct 2024 | Tutorials | |
| Lecture 20 | 18th Oct 2024 | Control Instruction, Instruction Control Cycle (Ch 4.3.3, 4.3.4 in [1]), | |
| Tradeoffs Involved in Register Set and Opcode (Ch 5.1.1-5.1.4 in [1]) | |||
| Lecture 21 | 19th Oct 2024 | Tradeoffs Involved in Data Type and Addressing Mode | |
| (Ch 5.1.5-5.1.6) in [1]), Operate and Data Movement | |||
| Instructions execution using Addressing Mode (Ch 5.2 and 5.3 in [1]) | |||
| Lecture 22 | 22nd Oct 2024 | Conditional Codes in LC-3, Branch Instruction in MIPS | |
| (Ch 5.1.7 and 5.4 in [1] and Ch 6.4.2 in [2]), Data Flow Execution Model | |||
| Lecture 23 | 24th Oct 2024 | Microarchitecture: Intro And Performance Analysis (Ch 7.1, 7.2 in [2]) | |
| Lecture 24 | 25th Oct 2024 | Single Cycle Processor (Ch 7.3.1, 7.3.2, 7.3.4 in [2]) | |
| Lecture 25 | 26th Oct 2024 | Multi-Cycle Processor (Ch 7.4.1 in [2]) | |
| Lecture 26 | 26th Oct 2024 | Multi-Cycle Processor (Ch 7.4.2, 7.4.4 in [2]) | |
| Lecture 27 | 29th Oct 2024 | Piplined Processor (Ch 3.6, 7.5.1, 7.5.2 in [2]) | |
| Lecture 28 | 5th Nov 2024 | Piplined Processor (Ch 7.5.3, 7.5.4, 7.5.5 in [2]) | |
| Lecture 29 | 7th Nov 2024 | Memory System (Ch 8.1, 8.2 in [2]) | |
| Lecture 30 | 8th Nov 2024 | Cache (Ch 8.3.1, 8.3.2 in [2]) | |
| Lecture 31 | 9th Nov 2024 | Cache (Ch 8.3.1, 8.3.2 in [2]) | |
| Quiz | 9th Nov 2024 | Quiz | |
| Lecture 32 | 12th Nov 2024 | Cache (Ch 8.3.2, 8.3.3 in [2]) | |
| Lecture 33 | 14th Nov 2024 | Tutorials | |
| Endterm Exam | 1st Dec, 2024 | ||
| **** | |||
Problem Set |
-- | Problem Set |
| Nr. | Book | Authors |
|---|---|---|
| [1] | Introduction to Computing Systems (3rd Edition) | Yale N. Patt and Sanjay J. Patel |
| [2] | Digital Design and Computer Architecture | David Money Harris and Sarah .L Harris |